Operations Research Transactions ›› 2021, Vol. 25 ›› Issue (3): 15-36.doi: 10.15960/j.cnki.issn.1007-6093.2021.03.002

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Optimization models and algorithms for placement of very large scale integrated circuits

HUANG Zhipeng1, LI Xingquan2, ZHU Wenxing1,2,*   

  1. 1. Center for Discrete Mathematics and Theoretical Computer Science, Fuzhou University, Fuzhou 350116, Fujian, China;
    2. Peng Cheng Laboratory, Shenzhen 518055, Guangdong, China
  • Received:2021-03-15 Published:2021-09-26

Abstract: Placement is one of the critical stages in the physical design of very large scale integrated circuits (VLSI), which has significant impact on the performance of integrated circuits, such as routability, delay, power consumption, circuit reliability, etc. Placement determines the specific positions of cells of a chip, by optimizing some performance metrics under the constraint of cells non-overlapping, which is an NP-hard combinatorial optimization problem. Modern placement algorithms need to deal with large-scale designs with millions of cells, heterogeneous modules with different sizes, and various complex placement constraints. Modern placement algorithms usually consist of three steps:global placement, legalization, and detailed placement. Based on the recent research progress of VLSI placement algorithms, this paper surveys related optimization models and algorithms for VLSI global placement, legalization and detailed placement, and discusses possible research directions.

Key words: VLSI, global placement, legalization, optimization algorithm

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